A Side-Channel based Hardware Trojan Detection using Power Traces and Anomaly Detection Technique

Outsourcing of design and fabrication phases is increasing each day due to the time to market constraints. The security of integrated circuits remains a threat due to this prevailing third-party dependence. The malicious hardware trojans could be implanted at any stage of the design and fabrication phases. The supervised machine learning techniques require large amounts of balanced data and processing time. This proposed technique performs anomaly detection of imbalanced power values. A one-class SVM model is trained and tested using an unknown dataset. The AES-128 cryptographic circuit is considered in this work and the FPGA implementation is performed in the Sakura-G board. Various types of trojan trigger conditions are considered from the Trust Hub benchmark circuits. The experiments show that the proposed technique outperforms the existing TPR and accuracy values.