Efficient Design Space Exploration for the BOOM Using SAC-Based Reinforcement Learning
Design space exploration (DSE) is crucial for optimizing the performance, power, and area (PPA) of CPU microarchitectures (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>-archs). While various machine learning (ML) algorithms have been applied to the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>-arch DSE problem, the potential of reinforcement learning (RL) remains underexplored. In this article, we propose a novel RL-based approach to address the reduced instruction set computer V (RISC-V) CPU <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>-arch DSE problem. This approach enables dynamic selection and optimization of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>-arch parameters without relying on predefined modification sequences, thus significantly enhancing exploration flexibility. To address the challenges posed by high-dimensional action spaces and sparse rewards, we use a discrete soft actor-critic (SAC) framework with entropy maximization to promote efficient exploration. In addition, we integrate multistep temporal-difference (TD) learning, an experience replay (ER) buffer, and return normalization to improve sample efficiency and learning stability during training. Our method further aligns optimization with user-defined preferences by normalizing PPA metrics relative to baseline designs. Experimental results on the Berkeley out-of-order machine (BOOM) demonstrate that the proposed approach achieves superior performance compared with state-of-the-art methods, showcasing its effectiveness and efficiency for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>-arch DSE. Our code is available at <uri xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">https://github.com/exhaust-create/SAC-DSE</uri>.
Authors
- Xiaoming Xiong (ORCID: https://orcid.org/0000-0002-2421-7621)
- Xian Lin (ORCID: https://orcid.org/0000-0002-5780-5948)
- Shuting Cai (ORCID: https://orcid.org/0000-0002-2842-6439)
- Bei Yu (ORCID: https://orcid.org/0000-0001-6406-4810)
- Shihan Zhang (ORCID: https://orcid.org/0009-0009-8339-4941)
- Mingjun Cheng (ORCID: https://orcid.org/0009-0000-4108-013X)
- Xin Zheng (ORCID: https://orcid.org/0000-0003-4931-9664)
- Huaien Gao (ORCID: https://orcid.org/0009-0001-0528-3076)
Institutions
- Guangdong University of Technology (CN)
- Chinese University of Hong Kong (HK)
Publication Details
- Journal
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Published
- 2025-06-17
- DOI
- https://doi.org/10.1109/tvlsi.2025.3572799
- Citations
- 1
- Primary Topic
- Advanced Manufacturing and Logistics Optimization
- Type
- article
- Field-Weighted Citation Impact
- 1.24
Funders
- Science and Technology Planning Project of Fuzhou