Error Mitigation Methods for FSM Using Triple Modular Redundancy

In many areas of operation, application-specific logic implemented in FPGAs (Field Programmable Gate Arrays) is critical. In these situations, various mitigation methods are used to reduce or completely eliminate malfunctions in the circuit resulting from undesired physical phenomena (e.g., ionizing radiation). Such phenomena may occur, among others, in medicine, the military, nuclear power, and space systems. One of the most popular methods is the use of triple modular redundancy (TMR). Here, the FPGA provides a good basis for building TMR-based safety-critical systems due to its concurrent processing. This paper presents an overview of the implementation of logic structures using TMR. In this paper, the authors focus on different concepts for the implementation of FSMs. The different concepts differ in the way TMR voters are attached and the extent of redundancy of the individual FSM components. The article compares the efficiency of the different solutions. In order to evaluate this efficiency, it is crucial to determine the logic utilization or the power consumption of a given implementation. In the experimental part of the article, the authors show the results of the synthesis of FSM benchmarks, for different mitigation models. The synthesis was carried out for both commercial and academic tools.