2D-SPARK

Two-dimensional (2D) semiconductors like transition metal dichalcogenides (TMDs) offer superior electrostatics control and prospects for three-dimensional heterogeneous integration, making them promising class of materials for next-generation very-large-scale integration (VLSI) circuits. However, the circuit design methodology for 2D semiconductors is still in its infancy, with current research primarily relying on manual layout creation. This paper presents a variation-aware design methodology for 2D semiconductor VLSI, aiming to address the challenges, particularly variations associated with material defects and non-standard processes, in this emerging field. The main contributions of this article include the establishment of a design infrastructure, optimization of variation tolerance, and verification of the design. Using this methodology, we designed a prototype 4-bit CPU, conducted simulation verification, and provided the layout to validate the feasibility of the process. Our methodology is essential for advancing 2D materials from devices to large-scale circuits and applications.