A 64/144 GHz Dual-Band Amplifier in 40-nm CMOS Technology

This paper proposes a dual-band amplifier implemented in a 40-nm complementary metal-oxide-semiconductor (CMOS) process that supports both the V-band (64 GHz) and the D-band (144 GHz) frequencies. Without employing additional active components, the input and output matching networks leverage resonant characteristics to enable dual-band operation within a single chip. Measurement results demonstrate that the proposed amplifier achieves a peak gain of 6.2 dB with a 3 dB bandwidth of 12.4 GHz at 64 GHz and a peak gain of 4.93 dB with a 3 dB bandwidth of 32.8 GHz at 144 GHz. The total power consumption is 13.2 mW, demonstrating its feasibility for practical applications. Given its single-stage configuration, the amplifier’s gain performance is expected to improve further upon extension to a multistage design. The proposed dual-band amplifier represents a promising solution for satisfying the high-speed and low-latency requirements of next-generation high-frequency communication systems.

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Publication Details

Journal
The Journal of Korean Institute of Electromagnetic Engineering and Science
Published
2025-05-01
DOI
https://doi.org/10.5515/kjkiees.2025.36.5.436
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
0.00

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article

A 64/144 GHz Dual-Band Amplifier in 40-nm CMOS Technology

Munkyo Seo, Kangwoo Park
The Journal of Korean Institute of Electromagnetic Engineering and Science
Radio Frequency Integrated Circuit Design
article

A 64/144 GHz Dual-Band Amplifier in 40-nm CMOS Technology

Munkyo Seo, Kangwoo Park
article en

Abstract

This paper proposes a dual-band amplifier implemented in a 40-nm complementary metal-oxide-semiconductor (CMOS) process that supports both the V-band (64 GHz) and the D-band (144 GHz) frequencies. Without employing additional active components, the input and output matching networks leverage resonant characteristics to enable dual-band operation within a single chip. Measurement results demonstrate that the proposed amplifier achieves a peak gain of 6.2 dB with a 3 dB bandwidth of 12.4 GHz at 64 GHz and a peak gain of 4.93 dB with a 3 dB bandwidth of 32.8 GHz at 144 GHz. The total power consumption is 13.2 mW, demonstrating its feasibility for practical applications. Given its single-stage configuration, the amplifier’s gain performance is expected to improve further upon extension to a multistage design. The proposed dual-band amplifier represents a promising solution for satisfying the high-speed and low-latency requirements of next-generation high-frequency communication systems.

The Journal of Korean Institute of Electromagnetic Engineering and ScienceVol. 36(5)
Sungkyunkwan University, Korea Institute for Advancement of Technology
Affordable and clean energy
Openalex Percentile: Top 88%
Radio Frequency Integrated Circuit Design
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