A MIMO-OFDM Framework for Video Streaming: An Error-Resilient FPGA Design with an Economical Perspective

nsmission of modulated data in several spatial streams, each of which is made up of many orthogonal subcarriers, is fundamental to Multiple Input Multiple Output (MIMO)-Orthogonal Frequency Division Multiplexing (OFDM). Nevertheless, we discover that current hardware implementations of MIMO-OFDM systems are less appropriate for use, particularly in low-power embedded devices, and need significant hardware resources. In this work, in order to fill this research gap, we develop and build a low-cost MIMO-OFDM system that may be used for video streaming in a Field Programmable Gate Array (FPGA) while still meeting the high-performance criteria required for video communication. In particular, we use configurable pilot symbols and a modulation approach that includes a 3-level BCH code that can handle up to 5-bit corrections per pixel, as well as an intra- and inter-pixel interleaver. To make the error-correcting code less complicated, we employ a simpler third-order generating polynomial and a precalculated Lookup Table (LUT). Karatsuba-inspired multiplications with fixed-point computations, shift register-driven correlators, and LUT-driven square root approximation are used at the receiver for synchronization. By using pipelining inside OFDM phases, multiplexing in the time domain among the four streams, we significantly minimize hardware complexity. In order to determine whether to decompose singular values for calculating the channel matrix inverse, we first approximate the channel matrix utilizing the least squares technique. Then, we perform channel equalization adaptively with reduced noise magnification by calculating the infinity norm difference among the current channel matrix and the most recent recognized channel matrix. Ultimately, the system was put into practice using Artix 7 FPGAs, validated by thorough simulations, and tested for actual data transfer. The outcomes demonstrate that the suggested system is error-resilient, economical, and energy-efficient when compared to current methods.

Authors

Publication Details

Journal
Engineer Journal of the Institution of Engineers Sri Lanka
Published
2025-06-13
DOI
https://doi.org/10.4038/engineer.v58i2.7691
Primary Topic
Error Correcting Code Techniques
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

A MIMO-OFDM Framework for Video Streaming: An Error-Resilient FPGA Design with an Economical Perspective

Patikiri Arachchige Don Shehan Nilmantha Wijesekara
Engineer Journal of the Institution of Engineers Sri Lanka
Error Correcting Code Techniques
article

A MIMO-OFDM Framework for Video Streaming: An Error-Resilient FPGA Design with an Economical Perspective

Patikiri Arachchige Don Shehan Nilmantha Wijesekara
article en

Abstract

nsmission of modulated data in several spatial streams, each of which is made up of many orthogonal subcarriers, is fundamental to Multiple Input Multiple Output (MIMO)-Orthogonal Frequency Division Multiplexing (OFDM). Nevertheless, we discover that current hardware implementations of MIMO-OFDM systems are less appropriate for use, particularly in low-power embedded devices, and need significant hardware resources. In this work, in order to fill this research gap, we develop and build a low-cost MIMO-OFDM system that may be used for video streaming in a Field Programmable Gate Array (FPGA) while still meeting the high-performance criteria required for video communication. In particular, we use configurable pilot symbols and a modulation approach that includes a 3-level BCH code that can handle up to 5-bit corrections per pixel, as well as an intra- and inter-pixel interleaver. To make the error-correcting code less complicated, we employ a simpler third-order generating polynomial and a precalculated Lookup Table (LUT). Karatsuba-inspired multiplications with fixed-point computations, shift register-driven correlators, and LUT-driven square root approximation are used at the receiver for synchronization. By using pipelining inside OFDM phases, multiplexing in the time domain among the four streams, we significantly minimize hardware complexity. In order to determine whether to decompose singular values for calculating the channel matrix inverse, we first approximate the channel matrix utilizing the least squares technique. Then, we perform channel equalization adaptively with reduced noise magnification by calculating the infinity norm difference among the current channel matrix and the most recent recognized channel matrix. Ultimately, the system was put into practice using Artix 7 FPGAs, validated by thorough simulations, and tested for actual data transfer. The outcomes demonstrate that the suggested system is error-resilient, economical, and energy-efficient when compared to current methods.

Engineer Journal of the Institution of Engineers Sri LankaVol. 58(2)
Openalex Percentile: Top 86%
Error Correcting Code Techniques
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.