Modeling and Verification of Sigma Delta Neural Networks using Satisfiability Modulo Theory

In the context of modern day embedded safety-critical systems and low-resource edge devices in particular, Sigma-Delta Neural Networks (SDNNs) offer a promising alternative to traditional Artificial Neural Networks (ANNs) by leveraging event-driven, sparse computations inspired by biological neural processing. This energy-efficient paradigm makes SDNNs well-suited for neuromorphic hardware and real-time applications, particularly in scenarios with temporal redundancy, such as video processing. However, as neural networks become integral to safety-critical systems, ensuring their robustness against adversarial perturbations is an absolute necessity. In this work, we propose an end-to-end framework for formal modeling and verification of SDNNs using Satisfiability Modulo Theory (SMT). Unlike empirical robustness evaluations, SMT-based verification provides formal guarantees by encoding SDNN behavior and adversarial robustness properties as mathematical constraints. We introduce an SMT-based formulation for encoding SDNNs with SMT constraints and define a robustness property motivated by video stream processing. Our approach systematically examines how well SDNNs can handle adversarial attacks, ensuring they work correctly in safety-critical applications. We validate our framework through experiments on temporal version of the MNIST dataset. To the best of our knowledge, this is the first formal verification framework for SDNNs, bridging the gap between neuromorphic computing and rigorous verification.

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Publication Details

Published
2025-06-13
DOI
https://doi.org/10.1145/3735452.3735525
Citations
1
Primary Topic
Fault Detection and Control Systems
Type
article
Field-Weighted Citation Impact
1.21
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article

Modeling and Verification of Sigma Delta Neural Networks using Satisfiability Modulo Theory

Ansuman Banerjee, Swarup Kumar Mohalik, Sanjib Das
1 citations
Fault Detection and Control Systems
1.21
article

Modeling and Verification of Sigma Delta Neural Networks using Satisfiability Modulo Theory

Ansuman Banerjee, Swarup Kumar Mohalik, Sanjib Das
article en
1 citations

Abstract

In the context of modern day embedded safety-critical systems and low-resource edge devices in particular, Sigma-Delta Neural Networks (SDNNs) offer a promising alternative to traditional Artificial Neural Networks (ANNs) by leveraging event-driven, sparse computations inspired by biological neural processing. This energy-efficient paradigm makes SDNNs well-suited for neuromorphic hardware and real-time applications, particularly in scenarios with temporal redundancy, such as video processing. However, as neural networks become integral to safety-critical systems, ensuring their robustness against adversarial perturbations is an absolute necessity. In this work, we propose an end-to-end framework for formal modeling and verification of SDNNs using Satisfiability Modulo Theory (SMT). Unlike empirical robustness evaluations, SMT-based verification provides formal guarantees by encoding SDNN behavior and adversarial robustness properties as mathematical constraints. We introduce an SMT-based formulation for encoding SDNNs with SMT constraints and define a robustness property motivated by video stream processing. Our approach systematically examines how well SDNNs can handle adversarial attacks, ensuring they work correctly in safety-critical applications. We validate our framework through experiments on temporal version of the MNIST dataset. To the best of our knowledge, this is the first formal verification framework for SDNNs, bridging the gap between neuromorphic computing and rigorous verification.

Indian Statistical Institute (IN)
Openalex Percentile: Top 20%
Fault Detection and Control Systems
1.21
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Modeling and Verification of Sigma Delta Neural Networks using Satisfiability Modulo Theory — Ansuman Banerjee, Swarup Kumar Mohalik, et al. · (2025) | TGRS Research Map | TGRS