Monolithic 3D Macro Integrating CMOS with Ambipolar SONOS Tunnel FET for High Performance Edge-AI Computing Applications

We developed a monolithic 3D (M3D) macro with CMOS and ambipolar SONOS tunnel FET (TFET) for edge-AI computing applications. The substrate-level (Tier-1) CMOS transistors for logic operations have good thermal stability to withstand the low-temperature TFETs fabrication process (< 400℃) above the Si-substrate (at Tier-2). The ambipolar SONOS-TFET, which is composed of intrinsic poly-Si channel with laser recrystallization process, provides large memory window (>6V) for multi-level data storage (> 10 levels). Among the potential applications is the in-memory range search for the memory augmented neural network (MANN). The data range can be pre-defined by different TFET device lengths and/or by varying the drain bias. The novel range computing macro enhances data matching capability between the query and objects using the K-nearest neighbor (KNN) algorithm. Simulation experiments with the CUB-200 dataset showed high voting accuracy up to 86.5% (Cosine similarity baseline: 87.7%) in few-shot learning (FSL) scenarios. The effects from TFET subthreshold swing, matching range, and input dimensions on the MANN accuracy optimization are discussed.