Energy-Efficient In-Memory Computing using 3D Flash Memory with Sequential Multi-Block Activation and Current Control Cell (CC cell)

In this work, we show that in-memory computing using 3D flash memory can be performed at extremely low power consumption. Since the high input voltage of Vpp for the word line (WL) driver circuit is externally supplied, the Vread for the WL voltage of unselected cells and the Vcc for supply voltage to circuits other than the WL driver can be reduced. The power consumption during read operation of single level cell (SLC) is reduced by 56% at Vcc and 98% at Vpp. The significant reduction of memory access energy allows the number of activation blocks and WLs for in-memory computing to be increased. We propose a novel approximate search method that combines the sequential multi-block activation with the current control cell (CC cell). Key vector data is stored in multiple blocks, and query vector data is input as WL voltage, and the on-current of each bit line (BL) is determined by the CC cell. No additional WL control circuit is required, and only one cell is used per data. We demonstrate that the inner product (IP) of the key and the query vector data can be determined with sufficient accuracy for 128-dimensional vectors as well as for 8-dimensional ones. The energy consumption is significantly reduced by 99.4%, and the memory access energy becomes 0.17 pJ/bit. This technology is fully compatible with conventional 3D flash memory and is essential for energy-efficient in-memory computing.