Comparative Study of Channel Materials for Ferroelectric NAND Applications

In this work, we compare the memory window (MW) and retention performance of laminated gate stacks for ferroelectric NAND (Fe-NAND) applications, considering both polysilicon and amorphous oxide semiconductor (AOS) channels. The laminated gate stack consists of a 3 nm Al<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>O<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> layer sandwiched between two 8 nm Hafnium Zirconium oxide (HZO) layers. Our results show that AOS channel-based ferroelectric field-effect transistors (Fe-FETs) exhibit a 1.5× larger MW than their polysilicon counterparts at comparable write voltage, primarily due to the absence of a channel interfacial layer (IL) in AOS devices. However, polysilicon Fe-FETs demonstrate significantly better retention, with a retention loss of less than 0.1% at 1000 seconds. In contrast, AOS-based Fe-FETs experience a 37% retention loss at 1000 seconds. We hypothesize that this is due to the presence of oxygen vacancies (Vo<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2+</sup>) in the channel, which deplete the electrons over time and increases the depolarization field to cause MW degradation. This study underscores the critical role of channel material selection in optimizing MW and retention performance for Fe-NAND applications.