Future Technology Outlook on DRAM/Flash Memories for More Moore and More Than Moore
As memory devices continue to scale down below the 10nm node, approaching an atomic scale, they encounter challenges in both device physics limits and in structure patterning. This poses a significant huddle for the semiconductor industry as it transitions into the era of AI and data-centric computing. In order to sustain scaling technology that has been crucial for the semiconductor industry’s growth, it is imperative to embrace innovative cell structures such as 3dimensional (3D) vertical cell stacking, as well as explore new materials beyond silicon channels (e.g., oxide semiconductors, ferroelectric materials), and 3D heterogeneous integration facilitated by wafer bonding technology must be adopted. This paper aims to investigate the future technological directions and potential candidates for DRAM and NAND Flash memory, in order to support the demands of the emerging AI industry.
Authors
- Kwangmin Park (ORCID: https://orcid.org/0000-0002-2749-8932)
- Daewon Ha (ORCID: https://orcid.org/0000-0002-9061-8626)
- Jaihyuk Song
- Youjian Song (ORCID: https://orcid.org/0000-0002-5182-8620)
- Jin‐Woo Han (ORCID: https://orcid.org/0000-0002-5118-1310)
- D. G. Cho
- Su Jung Shim (ORCID: https://orcid.org/0000-0002-2364-6651)
- Wanki Kim
- Kwangjin Moon
- Su Jin Ahn
- Sangjin Hyun
Institutions
- Samsung (South Korea) (KR)
Publication Details
- Published
- 2025-05-18
- DOI
- https://doi.org/10.1109/imw61990.2025.11026954
- Primary Topic
- Semiconductor materials and devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00