STT-MRAM Antifuse Macro for Memory, SoC, and FPGA Chips
While STT-MRAM as embedded and standalone memory is in production, we introduce silicon-proven Magnetic Tunnel Junction (MTJ) based antifuse macro in this paper. The antifuse macro is designed to operate with a part’s VDD supply without any complex high-voltage and precision bias circuitry, such as charge pump or voltage regulators. The combination of MTJ engineering and design architecture enables robust error-free performance without the need for any ECC correction. The wide density range from 512 bits to 10s of kbits in the STT-MRAM antifuse macro is suited for embedding distributed MRAM where the stored data stays close to the destination. The antifuse macro block is fast boot and fast read making it suitable for storing one-time programmable (OTP) configuration bits in standalone memory, FPGA, and SoC products in low power applications. The STT-MRAM antifuse macro is reflow protected and magnetic field immune.
Authors
- S. Aggarwal (ORCID: https://orcid.org/0000-0001-7855-7229)
- F. B. Mancoff (ORCID: https://orcid.org/0000-0002-0997-2522)
- X. Zhang
- K. Nagel
- S. Ikegawa (ORCID: https://orcid.org/0000-0002-3690-8964)
- H. Xu
- Yong Soo Kim (ORCID: https://orcid.org/0000-0001-8641-1035)
- M. Sadd
- S. M. Alam
- M. DeHerrera
Institutions
- Everspin Technologies (United States) (US)
Publication Details
- Published
- 2025-05-18
- DOI
- https://doi.org/10.1109/imw61990.2025.11026975
- Primary Topic
- Magnetic properties of thin films
- Type
- article
- Field-Weighted Citation Impact
- 0.00