Built-In Self-Test Measurement of Single Event Transients in the Skywater S90ln 90 Nm Process

Heavy-ion-induced single-event transients (SET) in combinational logic gates fabricated in the SkyWater S90LN 90 nm bulk CMOS process are measured experimentally using programmable built-in self-test (BIST) circuits. Four BIST circuits, differing only in the type of combinational logic gates, were simultaneously irradiated at the Lawrence Berkeley National Laboratory 88” Cyclotron facility using the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$16 \text{MeV} / \text{amu}$</tex> ion cocktail and a range of linear energy transfer (LET) values. The median SET pulse widths for minimally-sized inverters and those up to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$3 x$</tex> the minimum drive strength range between 70 and 630 ps, whereas the minimally-sized two-input NAND gates showed median pulse widths between 210 ps and 960 ps for LET values up to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$67 \text{MeV}-\text{cm}^{2} / \text{mg}$</tex>. For LET values of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$30 \text{MeV}-\text{cm}^{2} / \text{mg}$</tex> or less, nearly all SET pulse widths are contained to within 1 ns, with the maximum SET pulse width being 1.96 ns for the two-input NAND gates measured at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$67 \text{MeV}-\text{cm}^{2} / \text{mg}$</tex>. Further, cross-sections tend to be inversely proportional to drive strength, as expected.