Can the Agile-Chip Platform Carve Out a Niche Between ASICs and FPGAs?

The Agile-X (Agile-chip) platform is a type of Structured ASIC that enables the creation of LSI in a short period and at a low cost. In this method, only the wiring between gate arrays on a base chip, manufactured like a conventional ASIC using lower-layer wiring, is produced using Minimal-Fab. This allows any circuit to be manufactured based on the designer's specified GDS file. This paper evaluates this approach in comparison with a multi-project-wafer ASIC, an SRAM-based FPGA, and a one-time programmable FPGA. The results indicate that an implementation with only a single upper wiring layer has limited applicability beyond educational purposes. However, if two upper wiring layers are available, this approach can bridge the gap between one-time programmable FPGAs and ASICs.

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Publication Details

Published
2025-04-16
DOI
https://doi.org/10.1109/coolchips65488.2025.11018602
Primary Topic
Embedded Systems Design Techniques
Type
article
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article

Can the Agile-Chip Platform Carve Out a Niche Between ASICs and FPGAs?

Hirofumi Sumi, Tohru Mogami, Yoshio Mita, Atsutake Kosuge et al.
Embedded Systems Design Techniques
article

Can the Agile-Chip Platform Carve Out a Niche Between ASICs and FPGAs?

Hirofumi Sumi, Tohru Mogami, Yoshio Mita, Atsutake Kosuge, Yurie Inoue, Makoto Ikeda, Yukinori Ochiai, Naonobu Shimamoto, Hideharu Amano
article en

Abstract

The Agile-X (Agile-chip) platform is a type of Structured ASIC that enables the creation of LSI in a short period and at a low cost. In this method, only the wiring between gate arrays on a base chip, manufactured like a conventional ASIC using lower-layer wiring, is produced using Minimal-Fab. This allows any circuit to be manufactured based on the designer's specified GDS file. This paper evaluates this approach in comparison with a multi-project-wafer ASIC, an SRAM-based FPGA, and a one-time programmable FPGA. The results indicate that an implementation with only a single upper wiring layer has limited applicability beyond educational purposes. However, if two upper wiring layers are available, this approach can bridge the gap between one-time programmable FPGAs and ASICs.

The University of Tokyo (JP)
Openalex Percentile: Top 88%
Embedded Systems Design Techniques
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