Can the Agile-Chip Platform Carve Out a Niche Between ASICs and FPGAs?
The Agile-X (Agile-chip) platform is a type of Structured ASIC that enables the creation of LSI in a short period and at a low cost. In this method, only the wiring between gate arrays on a base chip, manufactured like a conventional ASIC using lower-layer wiring, is produced using Minimal-Fab. This allows any circuit to be manufactured based on the designer's specified GDS file. This paper evaluates this approach in comparison with a multi-project-wafer ASIC, an SRAM-based FPGA, and a one-time programmable FPGA. The results indicate that an implementation with only a single upper wiring layer has limited applicability beyond educational purposes. However, if two upper wiring layers are available, this approach can bridge the gap between one-time programmable FPGAs and ASICs.
Authors
- Hirofumi Sumi (ORCID: https://orcid.org/0000-0001-7511-8511)
- Tohru Mogami (ORCID: https://orcid.org/0000-0003-4382-2090)
- Yoshio Mita (ORCID: https://orcid.org/0000-0003-3655-1245)
- Atsutake Kosuge (ORCID: https://orcid.org/0000-0002-3394-2227)
- Yurie Inoue
- Makoto Ikeda (ORCID: https://orcid.org/0000-0002-6644-4224)
- Yukinori Ochiai
- Naonobu Shimamoto
- Hideharu Amano
Institutions
- The University of Tokyo (JP)
Publication Details
- Published
- 2025-04-16
- DOI
- https://doi.org/10.1109/coolchips65488.2025.11018602
- Primary Topic
- Embedded Systems Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00