GUPA: Group-Wise Uniform Pruning Accelerator for Depthwise Separable Convolution

Convolutional neural networks (CNNs) face significant deployment challenges on edge devices due to their high memory and computational demands. Depthwise separable convolution (DSC), with its reduced complexity and comparable accuracy, offers a promising solution. In this work, we propose an algorithm-hardware co-design that integrates a group-wise uniform pruning (GUP) strategy specifically tailored for DSC. This approach optimizes depthwise convolution (DWC) by channel pruning and pointwise convolution (PWC) by kernel pruning, with pruned channels in DWC propagating to PWC. Driven by the GUP strategy, we design a dual-engine DSC accelerator that fetches only unpruned weights and activations. Additionally, we optimized the dataflow and timing to minimize latency. The proposed GUP DSC accelerator is implemented in a 22 nm FDSOI technology, operating at a frequency of 1 GHz after signoff, and occupies an area of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.4 ~\text{mm}^{2}$</tex>. With 50 % pruning applied to the MobileNetV1 model, it reduces MAC operations by <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{7 4. 2 2 \%}$</tex>. The accelerator achieves an average energy efficiency of 24 TOPS/W and a throughput of 8365 GOPS.

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Publication Details

Published
2025-04-16
DOI
https://doi.org/10.1109/coolchips65488.2025.11018601
Primary Topic
Image Processing Techniques and Applications
Type
article
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article

GUPA: Group-Wise Uniform Pruning Accelerator for Depthwise Separable Convolution

Tobias Gemmeke, Christian Lanius, Jie Lou, Malte Wabnitz et al.
Image Processing Techniques and Applications
article

GUPA: Group-Wise Uniform Pruning Accelerator for Depthwise Separable Convolution

Tobias Gemmeke, Christian Lanius, Jie Lou, Malte Wabnitz, Yi Chen
article en

Abstract

Convolutional neural networks (CNNs) face significant deployment challenges on edge devices due to their high memory and computational demands. Depthwise separable convolution (DSC), with its reduced complexity and comparable accuracy, offers a promising solution. In this work, we propose an algorithm-hardware co-design that integrates a group-wise uniform pruning (GUP) strategy specifically tailored for DSC. This approach optimizes depthwise convolution (DWC) by channel pruning and pointwise convolution (PWC) by kernel pruning, with pruned channels in DWC propagating to PWC. Driven by the GUP strategy, we design a dual-engine DSC accelerator that fetches only unpruned weights and activations. Additionally, we optimized the dataflow and timing to minimize latency. The proposed GUP DSC accelerator is implemented in a 22 nm FDSOI technology, operating at a frequency of 1 GHz after signoff, and occupies an area of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.4 ~\text{mm}^{2}$</tex>. With 50 % pruning applied to the MobileNetV1 model, it reduces MAC operations by <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{7 4. 2 2 \%}$</tex>. The accelerator achieves an average energy efficiency of 24 TOPS/W and a throughput of 8365 GOPS.

RWTH Aachen University (DE)
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Image Processing Techniques and Applications
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