Hybrid ReRAM-NMC & SRAM-CiM Matrix Multiplication for Large Language Model

This paper proposes a novel design called hybrid ReRAM-Near-Memory Computing (NMC) & SRAM-Computation-in-Memory (CiM) Matrix Multiplication (MM) for Large Language Model (LLM). Non-volatile memory ReRAM introduces device error (i.e. conductance shift) due to its nonidealities. To enable the deployment of LLM on ReRAM-based CiM, the proposed design enhances model's robustness by separating a small percentage of activations to SRAM-CiM and placing the remaining activations on ReRAM-NMC. Furthermore, a corresponding hardware architecture design is proposed to demonstrate the possible MAC circuit and hybrid-core pipeline. This paper demonstrates that the perplexity increases of Llama27B utilizing 6-bit precision quantization for both activations and weights are smaller than 2 for both gaussian error and shift error with the capacity percentage of SRAM less than 1%.

Authors

Institutions

Publication Details

Published
2025-04-16
DOI
https://doi.org/10.1109/coolchips65488.2025.11018598
Primary Topic
Network Packet Processing and Optimization
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Hybrid ReRAM-NMC & SRAM-CiM Matrix Multiplication for Large Language Model

Daqi Lin, Naoko Misawa, Ken Takeuchi, Tao Wang et al.
Network Packet Processing and Optimization
article

Hybrid ReRAM-NMC & SRAM-CiM Matrix Multiplication for Large Language Model

Daqi Lin, Naoko Misawa, Ken Takeuchi, Tao Wang, Kenshin Yamauchi, Chihiro Matsui
article en

Abstract

This paper proposes a novel design called hybrid ReRAM-Near-Memory Computing (NMC) & SRAM-Computation-in-Memory (CiM) Matrix Multiplication (MM) for Large Language Model (LLM). Non-volatile memory ReRAM introduces device error (i.e. conductance shift) due to its nonidealities. To enable the deployment of LLM on ReRAM-based CiM, the proposed design enhances model's robustness by separating a small percentage of activations to SRAM-CiM and placing the remaining activations on ReRAM-NMC. Furthermore, a corresponding hardware architecture design is proposed to demonstrate the possible MAC circuit and hybrid-core pipeline. This paper demonstrates that the perplexity increases of Llama27B utilizing 6-bit precision quantization for both activations and weights are smaller than 2 for both gaussian error and shift error with the capacity percentage of SRAM less than 1%.

Tokyo University of Information Sciences (JP), The University of Tokyo (JP)
Openalex Percentile: Top 88%
Network Packet Processing and Optimization
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.

Hybrid ReRAM-NMC & SRAM-CiM Matrix Multiplication for Large Language Model — Daqi Lin, Naoko Misawa, et al. · (2025) | TGRS Research Map | TGRS