Scalable and Interchangeable Array-Based High-Resolution Sub-Terahertz Imaging using 0.25-μm CMOS Technology

A scalable and interchangeable 8×8 CMOS detector array module is proposed for sub-terahertz imaging systems. The architecture supports expansion from a 2×2 detector IC to 4×4 and 8×8 configurations. Each 2×2 detector IC, featuring an integrated antenna, is mounted on a daughterboard. In the 8×8 array configuration, four daughterboards are arranged on a motherboard, with the detector ICs placed at the corners of the daughterboards and evenly distributed at the center of the motherboard. Interconnections for biasing and output readout are implemented via multilayer transmission lines routed between uniformly spaced ICs. The detector ICs, fabricated using a 0.25-μm CMOS process, demonstrated a mean voltage responsivity of 214.9 kV/W with a standard deviation of 46.6 kW/W and a noise equivalent power of 21.7 pW/√Hz with a standard deviation of 4.8 pW/ √Hz at 0.2 THz, across a 36×36 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> 8×8 array. Raster-scanned imaging at intervals of 10, 8, 6, 4, 2, and 1 mm yields an image correlation index of 0.77, enabling sub-wavelength pattern recognition down to 1 mm.