Design and Comparative Analysis of 1-BIT ALU and Full Adder using MGDI Technique for High-Performance PLC Applications

With the growing demand for low-power, smaller chips driven by modern scientific and technological advancements, arithmetic operations like addition, which are performed by Arithmetic Logic Units and Full adders, remain crucial in Graphic Processing Units, Central Processing Units, and microcontrollers. In this scenario, the integration of multiple logical circuits can be beneficial and efficient for industrial use. This paper presents 1-BIT ALU, 10-T Full-adder, and NAND output and selects them with a multiplexer circuit, which leads to a programmable logic controller circuit for high-speed and low-power applications with the Modified Gate Diffusion Input technique in a 90nm transistor size. The advantage of MGDI logic is that it has a lower transistor count than complementary metal-oxide semiconductors and gate diffusion input techniques. The purpose of this induced design is to reduce the area of conventional logic units and to decrease the power dissipation. The conventional PLC unit consists of at least 128 transistors, whereas this proposed design has only 54 transistors. So, the chip area is decreased in the proposed design. All simulations are performed in Cadence Virtuoso Software.