Two Passive Pulse Doubling Techniques for Harmonics Mitigation of Line Current

Two passive pulse doubling topologies are suggested in this paper to offset the input current's THD value. This article's designs make use of a traditional 24-pulse passive rectifier, which we modified into two new 48-pulse rectifiers by connecting the suggested pulse doubling circuits. This article proposes two 48-pulse rectifier designs, called scheme I and scheme II. Scheme I has a MPIT occupied pulse multiplication circuit that produces a THD of 3.63% at 100% load, while Scheme II is constructed with an ETR based current injection circuit that results in a THD of 3.54% at full load. Both of the determined THD values fully satisfy the requirements of the IEEE 519-1992 standard, which is recognized as the best tolerance for harmonic limiting. Along with the required data and mathematical formulae, this article also describes the THD performances of the intended 48-pulse AC-DC converters and the operating modes of the suggested pulse doubling circuits.