A High-Performance, Low-Noise Class-AB Folded-Cascode Op-Amp with Novel Biasing Circuit for Biomedical Applications

This study introduces a high-performance folded cascode (FC) operational amplifier (Op-Amp) architecture with a novel biasing circuit and area-optimized custom layout for enhanced performance. The proposed architecture has a gain of 120 dB and can go up to 127.3 dB of DC gain. The Op-Amp can deliver a Common Mode Rejection Ratio (CMRR) of more than 130 dB, and a Power Supply Rejection Ratio (PSRR) of up to 110.93 dB, and only occupies an area of 0.03133 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. The design exhibits a gain-bandwidth product of 5.6 MHz, a phase margin of 81.84 degrees, and a slew rate of up to 4.61 V/µs, surpassing comparable designs found in existing literature. A novel biasing circuit improves the management of the PSRR while minimizing the influence of channel length modulation effects. The architecture utilizes a class-AB output stage to improve the driving strength of the Op-Amp. Additionally, it incorporates a PMOS-driven FC input stage, which effectively mitigates flicker noise, and satisfies the demanding criteria of biomedical applications.

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Publication Details

Published
2024-12-20
DOI
https://doi.org/10.1109/iccit64611.2024.11021866
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
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article

A High-Performance, Low-Noise Class-AB Folded-Cascode Op-Amp with Novel Biasing Circuit for Biomedical Applications

Sajib Bain, Shomen Kundu, Sabbir Ahmed, Md. Muhiul Islam Muhiuddin et al.
Analog and Mixed-Signal Circuit Design
article

A High-Performance, Low-Noise Class-AB Folded-Cascode Op-Amp with Novel Biasing Circuit for Biomedical Applications

Sajib Bain, Shomen Kundu, Sabbir Ahmed, Md. Muhiul Islam Muhiuddin, Sajib Biswas Shuvo
article en

Abstract

This study introduces a high-performance folded cascode (FC) operational amplifier (Op-Amp) architecture with a novel biasing circuit and area-optimized custom layout for enhanced performance. The proposed architecture has a gain of 120 dB and can go up to 127.3 dB of DC gain. The Op-Amp can deliver a Common Mode Rejection Ratio (CMRR) of more than 130 dB, and a Power Supply Rejection Ratio (PSRR) of up to 110.93 dB, and only occupies an area of 0.03133 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. The design exhibits a gain-bandwidth product of 5.6 MHz, a phase margin of 81.84 degrees, and a slew rate of up to 4.61 V/µs, surpassing comparable designs found in existing literature. A novel biasing circuit improves the management of the PSRR while minimizing the influence of channel length modulation effects. The architecture utilizes a class-AB output stage to improve the driving strength of the Op-Amp. Additionally, it incorporates a PMOS-driven FC input stage, which effectively mitigates flicker noise, and satisfies the demanding criteria of biomedical applications.

Bangladesh University of Engineering and Technology (BD)
Affordable and clean energy
Openalex Percentile: Top 74%
Analog and Mixed-Signal Circuit Design
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