Design of FPGA-based Digital Filter for Electroencephalogram Signal Processing

Electroencephalogram (EEG) is the signal acquired from the brain which gives an electrical description of the brain activity. EEG signal is analyzed to study various neuro and brain diseases and the function of the brain. However, data acquisition of EEG signals incorporates various types of noises that must be removed before further analysis. In the modem world, medical devices are developed for hardware-based analysis at a lower cost. Hence in this study, we have designed an FPGA-based filter for denoising EEG signals. For the validation of the designed system, real-time EEG signals have been collected from 5 subjects using the Biopac system lab module. Previous studies focused on removing mainly high-frequency noises and analyzed resource utilization but the removal of other noises and power utilization of their designed systems as well as proper performance analysis were lacking. We have checked various windowing techniques for filter designing and chosen the optimized model in terms of resource and power utilization. The best model is designed using hamming windowing which consumes 0.251 W power in its operation. The power and resource utilization analysis validates its feasibility while the Fast Fourier Transform (FFT) of the filtered output on real-time EEG signals suggests that it can remove the undesired noises from the signal. The design can be further utilized and expanded to design disease detection and embedded in medical devices.