Overcoming Charge Sharing, Race Condition, and Noise Sensitivity in Ternary DDCVSL Circuits

Dynamic Differential Cascode Voltage Switch Logic (DDCVSL) is a circuit design that combines static DCVSL with dynamic logic to achieve the benefits of both simultaneously. It provides a robust structure and can be used in high-performance circuits due to its small size and high speed. However, dynamic logic has lower noise tolerance than its static counterpart and faces issues such as charge sharing and race conditions. These challenges are even more problematic in ternary logic, where voltage levels are closer to each other. This paper applies some well-known, promising binary techniques tackling these problems to ternary DDCVSL. The effectiveness of these techniques in ternary logic is put under careful examination. Simulation results show that the application of noise enhancement techniques increases the tolerance of the DDCVSL circuit by 1.5X and 4X, respectively, and also prevents race and charge sharing.