Hardware Accelerator for Approximation-Based Softmax and Layer Normalization in Transformers

Transformer-based models have achieved remarkable success across various AI tasks, but their growing complexity has led to significant computational and memory demands. While most optimization efforts have focused on linear operations such as matrix multiplications, non-linear functions like Softmax and layer normalization (LayerNorm) are increasingly dominating inference latency, especially for long sequences and high-dimensional inputs. To address this emerging bottleneck, we present a hardware accelerator that jointly approximates these non-linear functions using piecewise linear approximation for the exponential in Softmax and Newton–Raphson iteration for the square root in LayerNorm. The proposed unified architecture dynamically switches operation modes while reusing hardware resources. The proposed accelerator was implemented on a Xilinx VU37P FPGA and evaluated with BERT and GPT-2 models. Experimental results demonstrate speedups of up to 7.6× for Softmax and 2.0× for LayerNorm, while maintaining less than 1% accuracy degradation on classification tasks with conservative approximation settings. However, generation tasks showed greater sensitivity to approximation, underscoring the need for task-specific tuning.

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Publication Details

Journal
Electronics
Published
2025-06-07
DOI
https://doi.org/10.3390/electronics14122337
Citations
2
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
1.46
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article

Hardware Accelerator for Approximation-Based Softmax and Layer Normalization in Transformers

Joungmin Park, Jinyeol Kim, Raehyeong Kim, Seung Eun Lee et al.
2 citations
Electronics
Advanced Memory and Neural Computing
1.46
article

Hardware Accelerator for Approximation-Based Softmax and Layer Normalization in Transformers

Joungmin Park, Jinyeol Kim, Raehyeong Kim, Seung Eun Lee, Dayoung Lee
article en
2 citations

Abstract

Transformer-based models have achieved remarkable success across various AI tasks, but their growing complexity has led to significant computational and memory demands. While most optimization efforts have focused on linear operations such as matrix multiplications, non-linear functions like Softmax and layer normalization (LayerNorm) are increasingly dominating inference latency, especially for long sequences and high-dimensional inputs. To address this emerging bottleneck, we present a hardware accelerator that jointly approximates these non-linear functions using piecewise linear approximation for the exponential in Softmax and Newton–Raphson iteration for the square root in LayerNorm. The proposed unified architecture dynamically switches operation modes while reusing hardware resources. The proposed accelerator was implemented on a Xilinx VU37P FPGA and evaluated with BERT and GPT-2 models. Experimental results demonstrate speedups of up to 7.6× for Softmax and 2.0× for LayerNorm, while maintaining less than 1% accuracy degradation on classification tasks with conservative approximation settings. However, generation tasks showed greater sensitivity to approximation, underscoring the need for task-specific tuning.

ElectronicsVol. 14(12)
Seoul National University of Science and Technology (KR)
Openalex Percentile: Top 17%
Advanced Memory and Neural Computing
1.46
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