A High-Performance Symmetric Hybrid Form Design for High-Order FIR Filters

In this paper, asymmetric hybrid form for high () Performance finite impulse response(FIR) filter switch symmetric D D D Coefficients is proposed, which can be utilized in both fixed and Reconfigurable FIR implementations to solve the driving capacity h h h Problem caused by the high fan out signals in the existing () Symmetric transposed form based FIR architecture.The D 0 Evaluation results show that, when compared with the existing (a)Direct form(3-tap) High speed FIR designs such as the symmetric systolic form in[13] And the hybrid for min[1], the proposed form can achieve () Significant area and power savings with great ADP and PDP D reduction.Moreover, when compared with the symmetric systolic For min[13] the required latency can be approximately reduced h h 1 h2 by33.3%,whichclearlyshowstheperformanceimprovementof()The proposed method.

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Publication Details

Journal
International Journal for Research Trends and Innovation
Published
2025-01-01
DOI
https://doi.org/10.56975/ijrti.v10i6.204504
Primary Topic
Digital Filter Design and Implementation
Type
article
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article

A High-Performance Symmetric Hybrid Form Design for High-Order FIR Filters

arramoni amala
International Journal for Research Trends and Innovation
Digital Filter Design and Implementation
article

A High-Performance Symmetric Hybrid Form Design for High-Order FIR Filters

arramoni amala
article en

Abstract

In this paper, asymmetric hybrid form for high () Performance finite impulse response(FIR) filter switch symmetric D D D Coefficients is proposed, which can be utilized in both fixed and Reconfigurable FIR implementations to solve the driving capacity h h h Problem caused by the high fan out signals in the existing () Symmetric transposed form based FIR architecture.The D 0 Evaluation results show that, when compared with the existing (a)Direct form(3-tap) High speed FIR designs such as the symmetric systolic form in[13] And the hybrid for min[1], the proposed form can achieve () Significant area and power savings with great ADP and PDP D reduction.Moreover, when compared with the symmetric systolic For min[13] the required latency can be approximately reduced h h 1 h2 by33.3%,whichclearlyshowstheperformanceimprovementof()The proposed method.

International Journal for Research Trends and InnovationVol. 10(6)
Affordable and clean energy
Openalex Percentile: Top 85%
Digital Filter Design and Implementation
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