Current Ripple Reduction and ZVS Realization With Optimized DCM Modulation Based on Off-Time Discrete Control for Grid-Tied Inverters

This article proposes a modulation strategy for single-phase full-bridge grid-tied inverters operated with discontinuous current mode (DCM). Zero voltage switching (ZVS) for turn-on can be achieved by discretely adjusting the length of zero current period, in which the voltage across the devices is oscillating in the DCM-operated inverter. However, the conventional bipolar modulation for DCM leads to a high current ripple flowing into the semiconductor devices and inverter-side inductors. In addition to that, a non-negligible reverse current flows at the end of device conduction due to charge and discharge the parasitic capacitance of the semiconductor devices especially for the designs with high switching frequency. This article proposes an advanced trapezium-like current modulation to reduce the current ripple, including the reverse current. In the proposed modulation, the current ripple is quantitatively analyzed by considering the impact of the device parasitic capacitance and reduced to the minimum value at which ZVS can be maintained. The effect of the current ripple reduction on conduction losses in semiconductor devices is analyzed using various design considerations, including chip size and operating switching frequency. The loss reduction by the proposed strategy was verified in experiments using a 400-W prototype with GaN-HEMT devices operating with the switching frequency of 1 MHz.