Amorphous Silicon Avalanche Photodiode for Back-End-of-Line CMOS Integration
An amorphous silicon avalanche photodiode with a very low breakdown voltage is presented for back-end-ofline integration. The device is fabricated using Plasma Enhanced Chemical Vapour deposition at a low temperature of 300°C, using processes compatible with CMOS. The diodes can be vertically integrated, enabling geometrical fill factors up tp 100% geometrical fill factors. The device is experimentally characterised to operate in Geiger mode at 635 nm wavelength, with an operating voltage of 7.5 V, which is significantly lower than breakdown voltages of typical crystalline silicon avalanche photodiodes.
Authors
- Soumya Shatakshi Panda
- Maurice Müller (ORCID: https://orcid.org/0000-0002-2080-5143)
- Andreas Bablich (ORCID: https://orcid.org/0000-0002-7487-1373)
- P. Haring Bolívar (ORCID: https://orcid.org/0000-0001-5875-556X)
- Moin Diwan
- Zidu Li (ORCID: https://orcid.org/0000-0002-8348-4957)
- Bhaskar Choubey (ORCID: https://orcid.org/0000-0002-5969-4399)
Institutions
- University of Siegen (DE)
Publication Details
- Journal
- IEEE Sensors Letters
- Published
- 2025-06-09
- DOI
- https://doi.org/10.1109/lsens.2025.3578088
- Citations
- 2
- Primary Topic
- Thin-Film Transistor Technologies
- Type
- article
- Field-Weighted Citation Impact
- 1.46