Hierarchical Optimization Algorithm for the Automatic Design of Analog Integrated Circuit

In this work, we have explored the use of hierarchical optimization technique to automatically design low dropout regulator. When we use genetic algorithm for multi-objective optimization, the increase of design variables will greatly increase the difficulty of optimization. Therefore, we divide the whole circuit into different levels and only upload the sub circuits’ combination of design parameters to reduce the design variables and shorten the optimization time. In our work, we have explored the optimization results under different constraints, and compared them with the direct optimization results systematically.

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Publication Details

Published
2025-03-24
DOI
https://doi.org/10.1109/cstic64481.2025.11017809
Citations
1
Primary Topic
VLSI and FPGA Design Techniques
Type
article
Field-Weighted Citation Impact
0.73

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article

Hierarchical Optimization Algorithm for the Automatic Design of Analog Integrated Circuit

Yu Zong, Jing Wan
1 citations
VLSI and FPGA Design Techniques
0.73
article

Hierarchical Optimization Algorithm for the Automatic Design of Analog Integrated Circuit

Yu Zong, Jing Wan
article en
1 citations

Abstract

In this work, we have explored the use of hierarchical optimization technique to automatically design low dropout regulator. When we use genetic algorithm for multi-objective optimization, the increase of design variables will greatly increase the difficulty of optimization. Therefore, we divide the whole circuit into different levels and only upload the sub circuits’ combination of design parameters to reduce the design variables and shorten the optimization time. In our work, we have explored the optimization results under different constraints, and compared them with the direct optimization results systematically.

Fudan University (CN), State Key Laboratory of ASIC and System
Fudan University
Affordable and clean energy
Openalex Percentile: Top 28%
VLSI and FPGA Design Techniques
0.73
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