Micro Loading Improvement in Gate Etch

Due to the different pattern densities on the wafer surface, micro loading occurs in the isolated(ISO) pattern and dense pattern areas. Specifically manifested as slower etching in dense area, etching faster in ISO area, which resulted in the etching depth loading of two areas in gate etching. And it will lead to the poly bottom profile loading for different pattern densities. Seriously, damage on the substrate Si of ISO area is already present before dense area etching to the end. This is not acceptable in Gate etching. Therefore, this paper addresses the micro loading issue within a tradition film stack structure of poly gate etching.