Investigation on Leakage Risk of HV PNP ESD Devices in LDMOS Platform

High-voltage (HV) PNP devices are commonly designed for electrostatic damage (ESD) protection of lateral diffused metal-oxide-semiconductor (LDMOS) in automotive Bipolar-CMOS-DMOS (BCD) platform. It is necessary to detect leakage failure problem of HV PNP devices in the early evaluation stage because of the leakage risk on actual application. In this paper, we used the wafer-level current limit loop-test method to measure the direct current breakdown voltage (DCBV) of the same sample several times at the limited current of I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</inf> and I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> (I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</inf><<I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>). The small current limit loop-test effectively obtained the device real DCBV while the large current limit loop-test could simulate the current state in customer real usage. It is confirmed that current limit loop-test method could screen out HV PNP ESD devices with leakage problems efficiently and effectively.