Study on Process Adjustments and APC for Precise Thickness Control of Embedded Semi-Floating Gates
The embedded semi-floating gate (SFG) process differs from conventional logic circuits by introducing the floating gate. In the development of a process compatible with both semi-floating gate and logic regions, the formation of the floating gate can lead to significant step height and pattern loading in the logic area. This issue prevents the floating gate from being monitored through the logic pad. This paper addressed this by adjusting the U-trench hard mask deposition and etch-back process to prevent the merging of semi-floating gates between hard masks, ensuring consistent thickness of the semi-floating gate on both Active Area(AA) and Shallow Trench Isolation(STI). Subsequently, by establishing inline measurement correlation and utilizing advanced process control (APC) technology, precise control of the semi-floating gate etching thickness had been achieved.
Authors
- Yanfei Ma (ORCID: https://orcid.org/0000-0002-2225-3362)
- Chang‐Feng Wang (ORCID: https://orcid.org/0000-0003-3000-2480)
- Shiling Yang
- Xueli Zhang
Institutions
- Shanghai Huali Microelectronics (China) (CN)
Publication Details
- Published
- 2025-03-24
- DOI
- https://doi.org/10.1109/cstic64481.2025.11017867
- Primary Topic
- Engineering Applied Research
- Type
- article
- Field-Weighted Citation Impact
- 0.00