3-D Mirror-Bit SONOS Memory Device with a Vertical-Channel Select Gate Transistor

To eliminate short channel effects of silicon-oxide-nitride-oxide-silicon (SONOS) memory, conventional 3-D SONOS flash arises but is too complicated to integrate with planar fabrication process. Herein, a simple 3-D mirror-bit SONOS memory device is proposed with well compatibility. This 3-D mirror-bit SONOS cell contains a vertical-channel select gate and two symmetrical planar memory gates. The operation on 3-D mirror-bit cells about erase, program and read was also designed to the avoid read disturb caused by hot carrier injection. Meanwhile, the electrical performances proves the effective operation on selected SONOS cell. This 3-D mirror-bit SONOS cell will inspired researchers to design more high-performance SONOS memory with small size, especially by simple planar fabrication process.