Analysis and Improvement of High Temperature LU Problem in CMOS RF Chip
In this paper, regarding the issue of high-temperature Latch-up (LU) on chips, we discovered a path for CMOS RF (Radio Frequency) chip to excite LU: under high temperature conditions the power supply passes through the clamp cell to the analog ground, the analog ground travels through the packaging path to the digital ground, and through the first level protection diode to the ESD discharge path of the digital IO pin. The ESD current causes the clamp to conduct, thereby triggering LU. Meanwhile, in order to improve the reliability of the chip, we have taken measures such as strengthening the power network and reducing resistance to avoid possible LU.
Authors
- Shuanshe Chao
- Xiao He (ORCID: https://orcid.org/0000-0003-3998-7060)
- Yanwei Tian
- Dan Yang (ORCID: https://orcid.org/0009-0002-7200-8506)
- Shuai Guo (ORCID: https://orcid.org/0000-0002-1732-2722)
- Huiming Zou
- Na Mei
Institutions
- China Mobile (China) (CN)
- State Key Laboratory of Mobile Networks and Mobile Multimedia Technology
Publication Details
- Published
- 2025-03-24
- DOI
- https://doi.org/10.1109/cstic64481.2025.11018007
- Primary Topic
- 3D IC and TSV technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00