Research on Reducing Leakage in 2T Sonos Embedded Flash by Preamorphization Implant

In this work, a method of reducing leakage in a 2 Mb embedded nonvolatile memory using 2T-SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) by preamorphization implant is proposed and verified. Although SONOS memory has excellent performance in storing charge and resisting defects, we still find single-bit failures due to leakage in the SONOS region. By high energy Ge implant, the ONO boundary in the SONOS region of the floating gate can be reduced due to process fluctuations, stress or other reasons to increase its uniformity, reduce the leakage electrons generated in the floating gate, thus reducing the tunnel thermal electrons generated by horizontal accumulation, and finally reduce the leakage caused by the accumulation of charge in the nitride layer of electricity storage. The most intuitive effect is that parameters of WAT test related to cell leakage can be reduced by 5% generally, and the maximum reduction can up to 20%. And CKBD/iCKBD failure efficiency decreases to a certain extent.