A Wafer Temperature Control System for Advanced Technology Node Manufacturing

Precise temperature control plays a crucial role of whole wafer uniformity in the manufacturing processes of advanced technology node. This paper presents AMEC’s wafer- temperature-control system, Durga II, which features adjustable local temperature fine tuning capabilities enabled by a separately controllable multi-zones electrostatic-chuck (ESC). The system demonstrates significant performance enhancements, achieving over 60% improvement in temperature distribution 3-sigma and range value on 300-mm wafer compared to traditional ESC. Additionally, Durga II enables post-etch amorphous-silicon thickness uniformity (TKU) of <10Å (3sigma) when plasma is involved, outperforming traditional CMP process and gas cluster ion beam (GCIB) methods as reported in prior studies. Beyond TKU, the system also supports critical dimension uniformity (CDU) tuning. Unlike traditional "feed-back" uniformity improvement relies on post etch performance, Durga II introduces a "feed-forward" tuning capability based on incoming film stack and CD/lithograph data. This system can be applied to both logic and memory chips etch manufacturing, which will greatly improve the accuracy and reliability in mass production by precise temperature control.