The Design of a Sub-Nanoampere (NA) Level Low-Offset Rail-To-Rail Unity-Gain Op-Amp

The widespread use of consumer electronic devices presents a significant challenge in op-amp design, requiring ultra-low power consumption alongside broad dynamic response.<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">[1]</sup> Specifically, the design of a sub-nanoampere (nA) level low-offset rail-to-rail input/output op-amp is crucial. We have developed a robust nA level low-offset rail-to-rail unity-gain op-amp using TSMC CMOS process. The core circuit comprises a constant transconductance input stage, folded cascode gain stage, and Class-AB output stage. Additionally, to meet slew rate and offset requirements, we integrated a custom-designed transient current boosting module and chopping techniques.