Design of Sub-THz Low-Power and High-Gain Amplifiers Based on Double-Embedded Technique

This article presents a sub-THz low-power and high-gain amplifier design technique based on a double-embedded pseudo-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$G_{\max }$</tex-math> </inline-formula>-core. The implementation of the double-embedded pseudo-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$G_{\max }$</tex-math> </inline-formula>-core adopts an additional linear, lossless, and reciprocal (LLR) network that satisfies the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$G_{\max }$</tex-math> </inline-formula>-condition for any even or odd number of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i>-stage cascaded transistor-level pseudo-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$G_{\max }$</tex-math> </inline-formula>-cores which have a stability factor and phase delay of 1 and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2m\pi $</tex-math> </inline-formula>/<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i>, respectively. By utilizing the proposed double-embedded pseudo-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$G_{\max }$</tex-math> </inline-formula>-cores, the amplifiers can achieve a higher gain with a reduced dc power consumption compared to the previously reported double-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$G_{\max }$</tex-math> </inline-formula> core-based amplifier, which can only employ an even number of stages. For proof of concept, two amplifiers are implemented in a 65-nm CMOS process which achieve power gain of 18.2 and 9.3 dB and gain-per-mW of 1.48 and 1.4 dB/mW at 280.2 and 309.2 GHz, respectively.