A High Current NMOS LDO Handles a Wide Range of Load Capacitors With Output Impedance Shaping Technique

This paper presents a low-dropout regulator (LDO) with a 5-A current capability, supporting a wide range of output capacitors. An output impedance shaping technique is proposed, introducing two half-zeros into the loop to shape the LDO’s output impedance between resistive and inductive characteristics. The proposed technique ensures a decent frequency and transient response across an output capacitance range from 0 to 150 μF. To achieve a widely adjustable output voltage, a two-stage buffer with fast transient response and active feedback is employed, which further improves the overall stability and transient performance of the LDO. Under light-load conditions, the current sensing module provides an auxiliary feedback path for the error amplifier (EA), thereby securing loop stability by pushing the dominant pole to a higher frequency and lowering the DC loop gain. Implemented with a 0.18 μm CMOS process, the chip occupies an area of 1.9 × 1.9 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. The LDO regulates an output voltage from 0.8 to 3.5 V within an input voltage range of 2.8 to 5.5 V. With a minimum dropout voltage of 150 mV, the open-loop gain is 80 dB and remains comparatively unaffected by load alterations, ensuring a robust load regulation of 1.3 mV/A. Measured results demonstrate a 170-mV undershoot during a 5-A/1-μs load step without external output capacitors.