Design of Scalable Hybrid Boost Converter With Optimal Number of Stages for High Conversion Ratio and High Power Efficiency

This paper presents a scalable hybrid boost converter (SHBC) with adjusted number of stages (N) to acquire high conversion ratio (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CR</i>) and high power efficiency. Firstly, unlike most converters where <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CR</i> is related only to duty cycle (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</i>), the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CR</i> of SHBC is related to both <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</i> and N. This allows the converter to provide a high <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CR</i> while keeping <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</i> at a reasonable value for easy loop control. Secondly, N flying capacitors in series with the inductor can divide output voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\mathrm {OUT}}$</tex-math> </inline-formula>) to use low voltage devices with small figure of metric (FOM) for high power efficiency. Moreover, N flying capacitors in parallel with the inductor can shunt the inductor current to reduce the inductor DCR loss, which also helps improve power efficiency. Thirdly, when many N values meet the requirements of a specific application scenario, an optimal number of stages (N<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OPT</sub>) is proposed to minimize the total loss and optimize the power efficiency further. The prototype design of SHBC with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mathrm{N}_{\mathrm {OPT}} =2$</tex-math> </inline-formula> has been discussed and fabricated by <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.18~\mu $</tex-math> </inline-formula>m BCD process. The measurement results demonstrate its operation is normal in the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CR</i> range from 4 to 8. Besides, a 93.34% peak efficiency is also achieved with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$I_{\mathrm {OUT}} =0.125$</tex-math> </inline-formula> A and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CR</i> = 4.

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Publication Details

Journal
IEEE Transactions on Circuits and Systems I Regular Papers
Published
2025-06-03
DOI
https://doi.org/10.1109/tcsi.2025.3571416
Primary Topic
Advanced DC-DC Converters
Type
article
Field-Weighted Citation Impact
0.00

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article

Design of Scalable Hybrid Boost Converter With Optimal Number of Stages for High Conversion Ratio and High Power Efficiency

Kai Yu, Mo Huang, Jingran Zhang, Youjun Deng et al.
IEEE Transactions on Circuits and Systems I Regular Papers
Advanced DC-DC Converters
article

Design of Scalable Hybrid Boost Converter With Optimal Number of Stages for High Conversion Ratio and High Power Efficiency

Kai Yu, Mo Huang, Jingran Zhang, Youjun Deng, Sizhen Li
article en

Abstract

This paper presents a scalable hybrid boost converter (SHBC) with adjusted number of stages (N) to acquire high conversion ratio (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CR</i>) and high power efficiency. Firstly, unlike most converters where <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CR</i> is related only to duty cycle (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</i>), the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CR</i> of SHBC is related to both <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</i> and N. This allows the converter to provide a high <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CR</i> while keeping <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</i> at a reasonable value for easy loop control. Secondly, N flying capacitors in series with the inductor can divide output voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\mathrm {OUT}}$</tex-math> </inline-formula>) to use low voltage devices with small figure of metric (FOM) for high power efficiency. Moreover, N flying capacitors in parallel with the inductor can shunt the inductor current to reduce the inductor DCR loss, which also helps improve power efficiency. Thirdly, when many N values meet the requirements of a specific application scenario, an optimal number of stages (N<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OPT</sub>) is proposed to minimize the total loss and optimize the power efficiency further. The prototype design of SHBC with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mathrm{N}_{\mathrm {OPT}} =2$</tex-math> </inline-formula> has been discussed and fabricated by <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.18~\mu $</tex-math> </inline-formula>m BCD process. The measurement results demonstrate its operation is normal in the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CR</i> range from 4 to 8. Besides, a 93.34% peak efficiency is also achieved with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$I_{\mathrm {OUT}} =0.125$</tex-math> </inline-formula> A and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CR</i> = 4.

IEEE Transactions on Circuits and Systems I Regular PapersVol. 72(12)
Guangdong University of Technology (CN), University of Macau (MO), Institute of Microelectronics (CN)
National Natural Science Foundation of China, Science and Technology Development Fund
Affordable and clean energy
Openalex Percentile: Top 90%
Advanced DC-DC Converters
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