Design of optical–electrical hybrid switching mechanism for array processors

Optoelectronic switching mechanisms are pivotal in on-chip interconnection communication, directly influencing the network’s latency and throughput. As system complexity and bandwidth demands increase, the integration of mixed optoelectronic circuit switching and optical packet switching flows has become essential, particularly in high-performance array processors. This paper investigates adaptive transmission strategies for such mixed data flows from three key perspectives. Firstly, we analyze the architecture and performance of an optoelectronic hybrid H-tree network, focusing on its ability to support high-bandwidth and low-latency communication within array processor environments. Secondly, we design a hybrid switching router capable of dynamically managing both circuit-switched and packet-switched traffic, optimizing resource allocation and network efficiency. Thirdly, we examine inter-cluster data exchange mechanisms, ensuring efficient and reliable communication between processing clusters across the hybrid network. Through these studies, we aim to provide insights into the design and optimization of adaptive optoelectronic hybrid switching for next-generation array processor interconnection networks.