A Precise and Low Power Analog Spiking Neural Network Exploiting Pre‐Charged Current Mode Synapses and Coarse‐Fine Neuron Comparators

ABSTRACT This paper proposed a precise and low power analog spiking neural network (SNN). It decreases the membrane current error and improves linearity of SNN with the proposed pre‐charged current‐mode synapses. Also, it reduces the neuron power consumption by replacing a static amplifier with an event‐driven coarse‐fine comparator. The proposed analogue SNN chip was fabricated using a 65 nm process. Its area is 2.4 × 2.77 mm 2 with 1024 × 256 synapses. The membrane capacitor is 4 pF. The pre‐charged synapse reduces the membrane current error by 15.38%. The event‐driven coarse‐fine comparator saves 49% neuron power.