Interplay of Short-Channel and Narrow-Width Effects in FDSOI Transistors at Cryogenic Temperatures

The fully depleted silicon-on-insulator (FDSOI) technology has been a preferred choice for cryo-CMOS IC designers, but the combined effects of scaling both channel length and width, along with temperature variations, have not been extensively explored in the context of super low threshold voltage (SLVT) device technology. The key device figures of merit (FOMs), including threshold voltage (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>th</roman></sub>), drain-induced barrier lowering (DIBL), subthreshold swing (SS), transconductance (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>m</i></sub>), and ON-resistance (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>ON</roman></sub>), exhibit varying behaviors under changes in temperature and device scaling. Specifically, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>th</roman></sub>, DIBL, and SS degrade in narrow-width devices at lower temperatures, while <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>ON</roman></sub>, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>m</i></sub>, and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>ON</roman></sub> improve. For short-channel devices, the FOMs behave similar to their room-temperature counterparts, but with a temperature-dependent offset at cryogenic temperatures. The underlying temperature-dependent effects at cryogenic temperatures are further analyzed using TCAD simulations at 8 K and room temperature (RT).

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Publication Details

Journal
IEEE Transactions on Electron Devices
Published
2025-06-02
DOI
https://doi.org/10.1109/ted.2025.3572029
Citations
7
Primary Topic
Semiconductor materials and devices
Type
article
Field-Weighted Citation Impact
5.11
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article

Interplay of Short-Channel and Narrow-Width Effects in FDSOI Transistors at Cryogenic Temperatures

Fikru Adamu-Lema, Martin Weides, Tapas Dutta, Fiheon Imroze et al.
7 citations
IEEE Transactions on Electron Devices
Semiconductor materials and devices
5.11
article

Interplay of Short-Channel and Narrow-Width Effects in FDSOI Transistors at Cryogenic Temperatures

Fikru Adamu-Lema, Martin Weides, Tapas Dutta, Fiheon Imroze, Hadi Heidari
article en
7 citations

Abstract

The fully depleted silicon-on-insulator (FDSOI) technology has been a preferred choice for cryo-CMOS IC designers, but the combined effects of scaling both channel length and width, along with temperature variations, have not been extensively explored in the context of super low threshold voltage (SLVT) device technology. The key device figures of merit (FOMs), including threshold voltage (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>th</roman></sub>), drain-induced barrier lowering (DIBL), subthreshold swing (SS), transconductance (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>m</i></sub>), and ON-resistance (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>ON</roman></sub>), exhibit varying behaviors under changes in temperature and device scaling. Specifically, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>th</roman></sub>, DIBL, and SS degrade in narrow-width devices at lower temperatures, while <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>ON</roman></sub>, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>m</i></sub>, and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>ON</roman></sub> improve. For short-channel devices, the FOMs behave similar to their room-temperature counterparts, but with a temperature-dependent offset at cryogenic temperatures. The underlying temperature-dependent effects at cryogenic temperatures are further analyzed using TCAD simulations at 8 K and room temperature (RT).

IEEE Transactions on Electron DevicesVol. 72(7)
University of Glasgow (GB)
Affordable and clean energy
Openalex Percentile: Top 5%
Semiconductor materials and devices
5.11
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