Single-Cycle Independent Component Analysis Processor for In-Band Full Duplex Systems

This paper presents a single-cycle independent component analysis (ICA) algorithm and architecture for self-interference cancellation (SIC) in In-band Full-duplex (IBFD) communication systems. The proposed algorithm, AICA-EBM, incorporates the adaptive momentum (ADAM) approach with the entropy-bound estimation (EBM) to achieve rapid convergence. The simulation results show that the proposed AICA-EBM algorithm leads to a constant single-cycle processing time to achieve satisfactory SIC optimality in IBFD systems. The architecture of the ICA processor based on the proposed AICA-EBM algorithm is designed. Novel circuit structures are proposed to reduce the complexity of the ICA processor. The AICA-EBM processor is implemented by following an application-specific integrated circuit (ASIC) flow with the TSMC 90 nm process. The post-layout estimations show that Compared to previous ICA processors, the proposed design achieves a 2x improvement in processing throughput and leads to the best hardware efficiency.