A dual protection technology to thwart hardware Trojan insertion based on observability

Abstract The globalization of the integrated circuit design industry makes it easier for the adversary to pirate intellectual property and insert hardware Trojans (HTs). Although many HT protection methods have been proposed, some malicious elements can still be inserted into vulnerable nodes. Trojans are usually inserted in the rare nodes with the lowest observability, which makes it hard for testers to discover them. In this paper, we propose a dual-protection technology to protect the circuit against HT attacks based on observability. First, we propose an algorithm to increase the low observabilities of the circuit, so as to make it difficult for attackers to implant HTs. Several existing approaches try to identify the low observability by setting a threshold artificially, which is not generic. We do not need to set thresholds when targeting the low observability. Second, we present another logic locking algorithm to enhance the entire circuit’s security further. Simulation results on ISCAS85 benchmark and several larger circuits show that the proposed HT protection method has increased the lowest observability of the circuit by an average of 370.76 times. Furthermore, the logic locking technique maximizes the ambiguity for an attacker. Compared with the state of the art, the proposed logic locking can obtain better results, achieving a Hamming distance that is closer to 50% between the correct and incorrect outputs when a wrong key is applied.