Scalable Vlsi Architecture For Deep Learning - Based Arrhythmia Identification
Effective real-time detection of arrhythmia, a serious cardiac disease, is necessary to allow for prompt medical intervention.In order to diagnose arrhythmia from ECG signals, this research presents a unique, power-efficient VLSI design that integrates a deep neural network (DNN).The design consumes just 11.098 W at 25 kHz and makes use of 28-nm bulk CMOS technology.Its classification accuracy in class-oriented evaluation is 92.37%, while in subject-oriented evaluation, it is 81.60%.The system's applicability for portable diagnostic systems is demonstrated by its optimisation to concentrate on low-frequency atrial activity in order to increase detection accuracy.
Authors
- T. Selvakumar
- P Santhosh
- Jayanth Sridhar (ORCID: https://orcid.org/0000-0003-0910-057X)
- Khushi Kumari
Publication Details
- Journal
- International Journal of Research Publication and Reviews
- Published
- 2025-05-01
- DOI
- https://doi.org/10.55248/gengpi.6.0525.1897
- Primary Topic
- ECG Monitoring and Analysis
- Type
- article
- Field-Weighted Citation Impact
- 0.00