FS ² : A Fast, Scalable, and Flexible Switching System for Emerging Interconnects

Cache-coherent interconnects such as CXL and CCIX have been introduced thanks to their cache coherence for a shared address space. However, we observe that it is difficult to scale such interconnects with 10-100s devices to fulfill the ever-increasing memory demands of bigdata applications. In this paper, we propose a switch-assisted scalable system architecture on top of those interconnects. Specifically, we introduce shared caches in interconnect-switches to efficiently exploit data reuse opportunities and to overcome the topological limitations by flexibly changing the topologies based on workload patterns. Our evaluation shows that our switch-assisted architecture provides higher scalability and up to 4.4× higher performance than native designs.