A 71–77 GHz Down-Conversion Mixer in 90-nm CMOS Process

This paper presents a down-conversion mixer for E-band applications in the 90-nm CMOS process. The proposed mixer adopts cross-coupled transistors current bleeding technique with an inductor for resonating the additional parasitic capacitance. Combined with a pre-amplifier, the proposed mixer achieves a peak gain of 22.3 dB at 75 GHz. The mixer's lowest noise figure also appears at 75 GHz with a value of 11.7 dB. The power consumption is 29.9 mW under a 1.2-V supply and the chip area is 0.714 mm × 0.567 mm.

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Published
2025-03-29
DOI
https://doi.org/10.1109/icct-pacific63901.2025.11012905
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
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article

A 71–77 GHz Down-Conversion Mixer in 90-nm CMOS Process

Yen‐Chung Chiang, Yiyao Huang, Haoyu Lin
Radio Frequency Integrated Circuit Design
article

A 71–77 GHz Down-Conversion Mixer in 90-nm CMOS Process

Yen‐Chung Chiang, Yiyao Huang, Haoyu Lin
article en

Abstract

This paper presents a down-conversion mixer for E-band applications in the 90-nm CMOS process. The proposed mixer adopts cross-coupled transistors current bleeding technique with an inductor for resonating the additional parasitic capacitance. Combined with a pre-amplifier, the proposed mixer achieves a peak gain of 22.3 dB at 75 GHz. The mixer's lowest noise figure also appears at 75 GHz with a value of 11.7 dB. The power consumption is 29.9 mW under a 1.2-V supply and the chip area is 0.714 mm × 0.567 mm.

National Chung Hsing University (TW)
Affordable and clean energy
Openalex Percentile: Top 90%
Radio Frequency Integrated Circuit Design
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