Therunet-SP: 2.5D IC Thermal Simulation Using U-Net Convolution and Scaling Procedure
As manufacturing process technology rapidly advances, power densities of integrated circuits (ICs) increase significantly, leading to the emergence of 2.5D IC design. Thermal issues have become more critical, necessitating thermal analysis through simulation in the design stage. Mature commercial tools use numerical methods to calculate chip temperatures but consume a lot of computational resources. Additionally, machine learning (ML) methods face challenges related to design geometry constraints. To address these issues, we develop a 2.5D IC thermal simulation method, Therunet-SP, based on the U-Net ML model with a scaling procedure to enhance design flexibility. Experimental results demonstrate that Therunet-SP can accurately estimate temperature maps of various chip designs with short runtime.
Authors
- Yu‐Min Lee (ORCID: https://orcid.org/0000-0002-4009-924X)
- Shun‐Ping Huang (ORCID: https://orcid.org/0000-0002-6060-3095)
- Lin Ye (ORCID: https://orcid.org/0000-0003-0062-6436)
Institutions
- National Yang Ming Chiao Tung University (TW)
Publication Details
- Published
- 2025-04-23
- DOI
- https://doi.org/10.1109/isqed65160.2025.11014417
- Primary Topic
- 3D IC and TSV technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00