Therunet-SP: 2.5D IC Thermal Simulation Using U-Net Convolution and Scaling Procedure

As manufacturing process technology rapidly advances, power densities of integrated circuits (ICs) increase significantly, leading to the emergence of 2.5D IC design. Thermal issues have become more critical, necessitating thermal analysis through simulation in the design stage. Mature commercial tools use numerical methods to calculate chip temperatures but consume a lot of computational resources. Additionally, machine learning (ML) methods face challenges related to design geometry constraints. To address these issues, we develop a 2.5D IC thermal simulation method, Therunet-SP, based on the U-Net ML model with a scaling procedure to enhance design flexibility. Experimental results demonstrate that Therunet-SP can accurately estimate temperature maps of various chip designs with short runtime.

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Publication Details

Published
2025-04-23
DOI
https://doi.org/10.1109/isqed65160.2025.11014417
Primary Topic
3D IC and TSV technologies
Type
article
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article

Therunet-SP: 2.5D IC Thermal Simulation Using U-Net Convolution and Scaling Procedure

Yu‐Min Lee, Shun‐Ping Huang, Lin Ye
3D IC and TSV technologies
article

Therunet-SP: 2.5D IC Thermal Simulation Using U-Net Convolution and Scaling Procedure

Yu‐Min Lee, Shun‐Ping Huang, Lin Ye
article en

Abstract

As manufacturing process technology rapidly advances, power densities of integrated circuits (ICs) increase significantly, leading to the emergence of 2.5D IC design. Thermal issues have become more critical, necessitating thermal analysis through simulation in the design stage. Mature commercial tools use numerical methods to calculate chip temperatures but consume a lot of computational resources. Additionally, machine learning (ML) methods face challenges related to design geometry constraints. To address these issues, we develop a 2.5D IC thermal simulation method, Therunet-SP, based on the U-Net ML model with a scaling procedure to enhance design flexibility. Experimental results demonstrate that Therunet-SP can accurately estimate temperature maps of various chip designs with short runtime.

National Yang Ming Chiao Tung University (TW)
Openalex Percentile: Top 90%
3D IC and TSV technologies
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