A Fully Adaptive Fault-Tolerant Routing Method for 3D-Torus Network-on-Chips

For developing dependable and high-performance processors which are key components in consumer systems and services, this paper proposes a fully adaptive fault-tolerant routing method for three-dimensional (3D) torus Network-on-Chips (NoCs). In contrast to existing methods, the proposed method allows to take minimal paths for any pairs of source and destination nodes by not only detouring faulty regions but also passing through them. Simulation results show that the proposed method reduces average communication latency by up to 30.6% with eight less virtual channels.