Unpacking the Interface Dipole Couplings of 0D/2D Carbon‐based Nonvolatile Optoelectronic Memory

Monolayer graphene has emerged as a key component of next-generation optoelectronic memory owing to its ultra-thin nature and seamless integration with silicon-based technology platform. However, the requirement of high erasing voltage, remains a significant hurdle. This can be accounted for by the charge trapping/de-trapping operation strategy of current heterostructure design, which results in less practicality and infeasibility for nonvolatile memory technology. In this work, a giant leap in erasing voltage down to -12 V and high on/off ratio of 8.2 × 10<sup>6</sup> under the low biases is revealed, originating from the mediation of interfacial dipolar coupling between 0D carbon quantum dots (CQDs) and 2D fluorine-functionalized graphene (f-Gra). Such 0D/2D interfacial circumstance, rather than intuitive charge transfer, introduces confined potential wells that immobilize the electrons: at adjacent CQDs the conduction-band offset prevents the electrons from returning to unoccupied valence states of CQDs, and near f-Gra the insulating F─C bonds negate further electron transport. Investigations on visualizing the interfacial physics of 0D/2D carbon-based designs, underscoring the performance improvement based on post anneal treatment, and unveiling the ternary buffering functionality in optical-signal processing, are anticipated to pave the keen step for the strategical designs of advanced optoelectronics.

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Publication Details

Journal
Small
Published
2025-05-29
DOI
https://doi.org/10.1002/smll.202502244
Citations
1
Primary Topic
Graphene research and applications
Type
article
Field-Weighted Citation Impact
0.52

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article

Unpacking the Interface Dipole Couplings of 0D/2D Carbon‐based Nonvolatile Optoelectronic Memory

Yen‐Hsun Su, Zhe‐Hao Liu, Le Võ Phương Thuận, Chia‐Yun Chen et al.
1 citations
Small
Graphene research and applications
0.52
article

Unpacking the Interface Dipole Couplings of 0D/2D Carbon‐based Nonvolatile Optoelectronic Memory

Yen‐Hsun Su, Zhe‐Hao Liu, Le Võ Phương Thuận, Chia‐Yun Chen, Po‐Hsuan Hsiao, Pin‐Chao Liao, Yiting Li
article en
1 citations

Abstract

Monolayer graphene has emerged as a key component of next-generation optoelectronic memory owing to its ultra-thin nature and seamless integration with silicon-based technology platform. However, the requirement of high erasing voltage, remains a significant hurdle. This can be accounted for by the charge trapping/de-trapping operation strategy of current heterostructure design, which results in less practicality and infeasibility for nonvolatile memory technology. In this work, a giant leap in erasing voltage down to -12 V and high on/off ratio of 8.2 × 10<sup>6</sup> under the low biases is revealed, originating from the mediation of interfacial dipolar coupling between 0D carbon quantum dots (CQDs) and 2D fluorine-functionalized graphene (f-Gra). Such 0D/2D interfacial circumstance, rather than intuitive charge transfer, introduces confined potential wells that immobilize the electrons: at adjacent CQDs the conduction-band offset prevents the electrons from returning to unoccupied valence states of CQDs, and near f-Gra the insulating F─C bonds negate further electron transport. Investigations on visualizing the interfacial physics of 0D/2D carbon-based designs, underscoring the performance improvement based on post anneal treatment, and unveiling the ternary buffering functionality in optical-signal processing, are anticipated to pave the keen step for the strategical designs of advanced optoelectronics.

SmallVol. 21(33)
National Cheng Kung University (TW)
Ministry of Science and Technology, Taiwan
Life below water
Openalex Percentile: Top 38%
Graphene research and applications
0.52
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