Concept Proof of Voltage Suppression across <scp>IGBT</scp> Application for Fuse‐Current‐Limiting Hybrid <scp>DCCBs</scp>
Abstract DC power systems require reliable and cost‐effective DC circuit breakers (DCCBs). In a previous study, we introduced a hybrid DCCB featuring a current‐limiting fuse, insulated gate bipolar transistor (IGBT), and a varistor connected in parallel. However, this DCCB could not seamlessly mitigate IGBT voltage stress caused by factors such as the arc voltage induced by the fuse during current limitation, the transient recovery voltage during current interruption, and the source voltage. Traditionally, multiple IGBT connections in series have been utilized to address the risk of IGBT breakdown caused by overvoltage. However, this method may lead to voltage imbalances among the serially connected IGBTs, causing them to break. In this study, we present a novel commutation‐path design for DCCBs that incorporates a vacuum contactor (VC) connected in series with the IGBT, alongside a capacitor connected in parallel with the IGBT path. The inclusion of the VC reduces the voltage across the IGBT; the inclusion of the parallel capacitor also reduces it at the moment of current interruption. This new commutation path design enables the voltage across the IGBT to be suppressed below original design requirements throughout the entire interruption process. © 2025 The Author(s). IEEJ Transactions on Electrical and Electronic Engineering published by Institute of Electrical Engineers of Japan and Wiley Periodicals LLC.
Authors
- Yusuke Nakano (ORCID: https://orcid.org/0000-0002-7718-7446)
- Hu Long (ORCID: https://orcid.org/0000-0003-2791-2416)
- Naoto Kodama (ORCID: https://orcid.org/0000-0002-0172-5965)
- Wataru Ohnishi (ORCID: https://orcid.org/0000-0002-4221-9305)
- Yubin He
- Shungo Zen
- Nozomi Takeuchi (ORCID: https://orcid.org/0000-0002-2115-6392)
- Yuki Inada (ORCID: https://orcid.org/0000-0002-8499-5740)
- Yuki Okegawa
Institutions
- Kanazawa University (JP)
- Tokyo Institute of Technology (JP)
- Aoyama Gakuin University (JP)
- Harbin Institute of Technology (CN)
- Nagoya University (JP)
- Saitama University (JP)
- The University of Tokyo (JP)
Publication Details
- Journal
- IEEJ Transactions on Electrical and Electronic Engineering
- Published
- 2025-05-29
- DOI
- https://doi.org/10.1002/tee.70073
- Citations
- 1
- Primary Topic
- HVDC Systems and Fault Protection
- Type
- article
- Field-Weighted Citation Impact
- 0.73
Funders
- New Energy and Industrial Technology Development Organization